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HA1630D08
Dual CMOS High Drive Operational Amplifier
REJ03D0860-0200 Rev.2.00 Nov 30, 2007
Description
HA1630D08 is a low power dual CMOS operational amplifier featuring high output current with typical current supply of 340 A for both channels (2.7 - 5.5 V). This IC designed to operate from a single power supply and have full swing outputs. Available in MMPAK-8 and TSSOP-8 package, the miniature size of this IC not only allows compact integration in portable devices but also minimizes distance of signal sources (sensors), thus reducing external noise pick up prior to amplification. This IC exhibit excellent current drive-power ratio capable of 600 load driving and yet resistant to oscillation for capacitive loads up to 400 pF.
Features
* * * * * IDD = 340 A Typ (VDD = 3 V, RL = No load) VDD = 2.7 V to 5.5 V VIO = 6 mV Max IIB = 1 pA Typ IOSOURCE = 30 mA Typ (VDD = 3.0 V, VOH = 2.5 V) IOSINK = 30 mA Typ (VDD = 3.0 V, VOL = 0.5 V) * Input common voltage range includes ground Low supply current Low voltage operation Low input offset voltage Low input bias current High output current
Ordering Information
Part No. HA1630D08MM HA1630D08T Package Name MMPAK-8 TSSOP-8 Package Code PLSP0008JC-A PTSP0008JC-B
REJ03D0860-0200 Rev.2.00 Nov 30, 2007 Page 1 of 14
HA1630D08
Pin Arrangement
VOUT1 1 VIN1(-) 2 VIN1(+) 3 VSS 4 (Top view)
-+ +-
8 VDD 7 VOUT2 6 VIN2(-) 5 VIN2(+)
Equivalent Circuit (1/2)
VDD
Vbias2
VIN(-) VIN(+) VOUT
Vbias1
Vbias3
VSS
REJ03D0860-0200 Rev.2.00 Nov 30, 2007 Page 2 of 14
HA1630D08
Absolute Maximum Ratings
(Ta = 25C)
Item Supply voltage Differential input voltage Input voltage Output current Power dissipation Operating temperature Storage temperature Note: Symbol VDD VIN(diff) VIN IOUT PT Topr Tstg Ratings 7.0 -VDD to +VDD -0.1 to +VDD 70 145 (MMPAK-8) 192 (TSSOP-8) -40 to +85 -55 to +125 Unit V V V mA mW C C Note 1
2
1. Do not apply input voltage exceeding VDD or 7 V. 2. If Ta > 25C, MMPAK-8: derate by -1.45 mW/C TSSOP-8: derate by -1.92 mW/C
Electrical Characteristics
DC Characteristics (Ta = 25C, VDD = 3.0 V, VSS = 0 V)
Item Input offset voltage Input bias current Input offset current Common mode input voltage range Supply current Output source current Output sink current Open loop voltage gain Common mode rejection ratio Power supply rejection ratio Output high voltage Output low voltage Note: ( ) : Design specification Symbol VIO IIB IIO VCM IDD IOSOURCE IOSINK AV CMRR PSRR VOH VOL Min -- -- -- -0.1 -- 15 15 55 50 55 2.9 -- Typ -- (1) (1) -- 340 30 30 80 80 80 -- -- Max 6 -- -- 1.8 1000 -- -- -- -- -- -- 0.1 Unit mV pA pA V A mA mA dB dB dB V V Test Conditions VIN = 1.5 V, RL = 1 M VIN = 1.5 V VIN = 1.5 V VIN(+) = 1.0 V, RL = Vout = 2.5 V Vout = 0.5 V RL = 100 k VIN1 = 0 V, VIN2 = 1.8 V VDD1 = 2.7 V, VDD2 = 5.5 V RL = 600 to VSS RL = 600 to VDD
AC Characteristics (Ta = 25C, VDD = 3.0 V, VSS = 0 V)
Item Slew rate Gain bandwidth product Note: ( ) : Design specification Symbol SRr SRf GBW Min -- -- -- Typ (1.5) (1.5) (2.0) Max -- -- -- Unit V/s MHz Test Conditions VIN = 1.5 V, CL = 15 pF (VINL = 0.2 V, VINH = 1.7 V) VIN = 1.5 V, CL = 15 pF
REJ03D0860-0200 Rev.2.00 Nov 30, 2007 Page 3 of 14
HA1630D08
Table of Graphs
Electrical Characteristics IDD VOH VOL IOSOURCE IOSINK VIO Characteristic Curves 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25, 26 27 28 29 Test Circuit No. 1 1 2 3 4 4 5 5 6 6 7 8 8 9 10 11, 12 11, 12 13 13 13 13 13 13 14 14 14 15 16
Supply current Output high voltage Output low voltage Output source current Output sink current Input offset voltage
Common mode input voltage range Common mode rejection ratio Power supply rejection ratio Input bias current Slew rate (rising)
VCM CMRR PSRR IIB SRr
Slew rate (falling)
SRf
Open loop gain Phase margin Channel separation Noise input voltage
AV PM CS VNI
vs. Supply voltage vs. Temperature vs. Rload vs. Rload vs. Output high voltage vs. Temperature vs. Output low voltage vs. Temperature vs. Supply voltage vs. Input voltage vs. Temperature vs. Supply voltage vs. Temperature vs. Input voltage vs. Supply voltage vs. Input voltage vs. Temperature vs. Cload vs. Temperature Time waveform vs. Cload vs. Temperature Time waveform vs. Rload vs. Frequency vs. Cload vs. Frequency vs. Frequency
REJ03D0860-0200 Rev.2.00 Nov 30, 2007 Page 4 of 14
HA1630D08
Test Circuits
(Unless otherwise noted, VDD = 3 V, VSS = 0 V, Ta = 25C)
1. Supply Current, IDD A VDD 2. Output High Voltage, VOH (Output High)
- + 1V
- + 1V
V RLOAD = 600
VDD
3. Output Low Voltage, VOL (Output Low) RLOAD = 600 V
4. Output Source Current, IOSOURCE
- + 1V
VDD
- + 1V
A VOUT
VDD
5. Output Sink Current, IOSINK
6. Input Offset Voltage vs. Operating Voltage 1 M 1 k
- + 1V
A VOUT
VDD VDD/2
- +
VOUT V
1 k 1 M VIO = VOUT / 1001
VDD
7. Input Offset Voltage, VIO 1 M 1 k 1 k 1 M - + VOUT V -1.5 V
8. Common Mode Input Voltage Range, VCM 1 M 1 k 1.5 V VIN 1 k - + 1 M
VCML Note: VCML and VCMH are values of VIN when VIO changes more than 50 dB taking VIN = 0 V as reference. VDD VIO VIN = 0 V VIN VCMH
VOUT V
1.5 V VIO = VOUT / 1001
REJ03D0860-0200 Rev.2.00 Nov 30, 2007 Page 5 of 14
HA1630D08
Test Circuits (cont.)
(Unless otherwise noted, VDD = 3 V, VSS = 0 V, Ta = 25C)
9. Common Mode Rejection Ratio, CMRR 1 M 1 k 1 k VIN 1 M -1.5 V - + VOUT V VIN 1.5 V -1.5 V 0.3 V Measure Point VOUT1 VOUT2 Calculate VIO VIO1 = VOUT1 / 1001 VIO2 = VOUT2 / 1001 CMRR Calculation CMRR = 20log10 |[VIO2 - VIO1]| 0.3 - (-1.5 V)
10. Power Supply Rejection Ratio, PSRR 1 M 1 k 1 k 1 M - + VOUT V -VDD/2 VDD VDD/2 2.7 V 5.5 V Measure Point VOUT1 VOUT2 Calculate VIO VIO1 = VOUT1 / 1001 VIO2 = VOUT2 / 1001 CMRR Calculation PSRR = 20log10 |[VIO2 - VIO1]| 5.5 V - 2.7 V
11. Input Bias Current, IIB+
12. Input Bias Current, IIB-
- A+ VIN
A VDD VIN
- +
VDD
13. Slew Rate (Large Signal Input) VIN - + 50 VOUT V 15 pF VDD 90% Vtr ttr 90% Vtf 10% ttf
1.7 V - 0.2 V
VOUT 10%
SRr = Vtr / ttr SRf = Vtf / ttf
REJ03D0860-0200 Rev.2.00 Nov 30, 2007 Page 6 of 14
HA1630D08
Test Circuits (cont.)
(Unless otherwise noted, VDD = 3 V, VSS = 0 V, Ta = 25C)
14. Open Loop Voltage Gain, AV 1 M 10 k 10 to 100 MHz -40 dBm V VIN 50 - + VOUT V -1.5 V 101 x |VOUT| |VIN|
1.5 V
AV = 20log10
15. Channel Separation, CS 10 k 10 k 10 to 100 MHz 10 dBm - + VOUT1 V -1.5 V 10 k 1.5 V 1 M - + VOUT2 V -1.5 V
1.5 V
50
Channel 1 CS = 20log10 101 x |VOUT2| |VOUT1|
Channel 2
16. Noise Input Voltage, VNI 1 M 1 k - + VOUT V -1.5 V VOUT 1001
1.5 V
VNI =
REJ03D0860-0200 Rev.2.00 Nov 30, 2007 Page 7 of 14
HA1630D08
Characteristic Curves
Figure 1 HA1630D08 Supply Current vs. Supply Voltage
Supply Current, IDD (A) Supply Current, IDD (A)
Figure 2 HA1630D08 Supply Current vs. Ambient Temperature 600
VDD = 5.5 V
600
400
400
VDD = 2.7 V, 3.0 V
200
200
0
2
3 4 5 Supply Voltage, VDD (V)
6
0 -50
-25 0 25 50 75 100 Ambient Temperature, Ta (C)
Figure 3 HA1630D08 Output High Voltage vs. Resistor Load
Output High Voltage, VOH (V) Output Low Voltage, VOL (V)
Figure 4 HA1630D08 Output Low Voltage vs. Resistor Load 0.2
VDD = 3.0 V
3.2 3.1 3.0 2.9 2.8 100
VDD = 3.0 V
0.1
0.0
1k 10 k Resistor Load, RL ()
100 k
-0.1 100
1k 10 k Resistor Load, RL ()
100 k
Output Source Current, IOSOURCE (mA)
Output High Voltage, VOH (V)
Figure 5 HA1630D08 Output High Voltage vs. Output Source Current 6 5 4 3 2 1
VDD = 2.7 V VDD = 3.0 V VDD = 5.0 V VDD = 5.5 V
Figure 6 HA1630D08 Output Source Current vs. Ambient Temperature 50
VDD = 3.0 V
40
30
0
0 20 40 60 80 100 Output Source Current, IOSOURCE (mA)
20 -50
-25 0 25 50 75 100 Ambient Temperature, Ta (C)
REJ03D0860-0200 Rev.2.00 Nov 30, 2007 Page 8 of 14
HA1630D08
Characteristic Curves (cont.)
Figure 7 HA1630D08 Output Low Voltage vs. Output Sink Current 6 5 4 3 2 1 0 0
VDD = 2.7 V VDD = 3.0 V VDD = 5.0 V VDD = 5.5 V
Output Sink Current, IOSINK (mA)
Output Low Voltage, VOL (V)
Figure 8 HA1630D08 Output Sink Current vs. Ambient Temperature 50
VDD = 3.0 V
40
30
20 40 60 80 100 Output Sink Current, IOSINK (mA)
20 -50
-25 0 25 50 75 100 Ambient Temperature, Ta (C)
Input Offset Voltage, VIO (mV)
6 4 2 0 -2 -4 -6 2 3 4 5 Supply Voltage, VDD (V) 6
Input Offset Voltage, VIO (mV)
Figure 9 HA1630D08 Input Offset Voltage vs. Supply Voltage
Figure 10 HA1630D08 Input Offset Voltage vs. Input Voltage 15 10 5 0 -5 -10 -15 -2.5 -1.5 -0.5 0.5 Input Voltage, VIN (V) 1.5
VDD = 1.5 V, VSS = -1.5 V
Input Offset Voltage, VIO (mV)
Figure 11 HA1630D08 Input Offset Voltage vs. Ambient Temperature 6
Common Mode Input Voltage, VCM (V)
VDD = 2.7 V, 3.0 V, 5.5 V
Figure 12 HA1630D08 Common Mode Input Voltage vs. Supply Voltage 5 4 3 2 1 0 -1 -2 2
VCM- Common Mode Input Voltage Range VCM+
4 2 0 -2 -4 -6 -50 -25 0 25 50 75 100 Ambient Temperature, Ta (C)
3 4 5 Supply Voltage, VDD (V)
6
REJ03D0860-0200 Rev.2.00 Nov 30, 2007 Page 9 of 14
HA1630D08
Characteristic Curves (cont.)
Figure 13 HA1630D08 Common Mode Input Voltage vs. Ambient Temperature 3.0
Common Mode Input Voltage, VCM (V)
VDD = 3.0 V VCM+
Common Mode Rejection Ratio, CMRR (dB)
Figure 14 HA1630D08 Common Mode Rejection Ratio vs. Input Voltage 120
VDD = 1.5 V, VSS = -1.5 V
100 80 60 40 20 0 -2 -1 0 Input Voltage, VIN (V) 1
2.0 1.0 0.0 -1.0 -50
VCM- Common Mode Input Voltage Range
-25 0 25 50 75 100 Ambient Temperature, Ta (C)
Power Supply Rejection Ratio, PSRR (dB)
Input Bias Current, IIB (pA)
Figure 15 HA1630D08 Power Supply Rejection Ratio vs. Supply Voltage 120 100 80 60 40 20 0 2 3 4 5 Supply Voltage, VDD (V) 6
Figure 16 HA1630D08 Input Bias Current vs. Input Voltage 100 50 0 -50 -100
VDD = 3.0 V
0
1 2 Input Voltage, VIN (V)
3
Slew Rate (rising), SRr (V/s)
Input Bias Current, IIB (pA)
Figure 17 HA1630D08 Input Bias Current vs. Ambient Temperature 100
VDD = 3.0 V
Figure 18 HA1630D08 Slew Rate (rising) vs. Capacitive Load 3.0
VDD = 3.0 V
50 0 -50 -100 -50
2.0
1.0
-25 0 25 50 75 100 Ambient Temperature, Ta (C)
0
0
100 200 300 Capacitive Load, CL (pF)
400
REJ03D0860-0200 Rev.2.00 Nov 30, 2007 Page 10 of 14
HA1630D08
Characteristic Curves (cont.)
Figure 19 HA1630D08 Slew Rate (rising) vs. Ambient Temperature
Slew Rate (rising), SRr (V/s)
Figure 20 HA1630D08 Slew Rate (rising)
3.0
VDD = 2.7 V, 3.0 V, 5.5 V
2.0
1.0
SRr = 1.70 V/s
0.0 -50
-25 0 25 50 75 100 Ambient Temperature, Ta (C)
Slew Rate (falling), SRf (V/s)
2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0
VDD = 3.0 V
Slew Rate (falling), SRf (V/s)
Figure 21 HA1630D08 Slew Rate (falling) vs. Capacitive Load
Figure 22 HA1630D08 Slew Rate (falling) vs. Ambient Temperature 3.0
VDD = 2.7 V, 3.0 V, 5.5 V
2.0
1.0
100 200 300 Capacitive Load, CL (pF)
400
0.0 -50
-25 0 25 50 75 100 Ambient Temperature, Ta (C)
Figure 23 HA1630D08 Slew Rate (falling)
Open Loop Gain, AV (dB)
Figure 24 HA1630D08 Open Loop Gain vs. Resistor Load 120 100 80 60 40 20 0 100 1k 10 k Resistor Load, RL () 100 k
VDD = 3.0 V
SRf = 1.94 V/s
REJ03D0860-0200 Rev.2.00 Nov 30, 2007 Page 11 of 14
HA1630D08
Characteristic Curves (cont.)
Figure 25 HA1630D08 Open Loop Gain, Phase vs. Frequency Figure 26 HA1630D08 Open Loop Gain, Phase vs. Frequency
Open Loop Gain, AV (dB)
80 60 40 20 0 -20 -40 10 100
Gain
VDD = 3.0 V RL = 100 k 180
Open Loop Gain, AV (dB)
100
225
100 80 60 40 20 0 -20 -40 10 100
Gain
VDD = 3.0 V CL = 400 pF 180
225
Phase (deg.)
135 90 45 0 -45
135 90 45 0 -45
Phase
Phase
1 k 10 k 100 k 1 M Frequency, f (Hz)
-90 10 M
1 k 10 k 100 k 1 M Frequency, f (Hz)
-90 10 M
Figure 27 HA1630D08 Phase Margin vs. Capacitive Load
Figure 28 HA1630D08 Channel Separation vs. Frequency
Channel Separation, CS (dB)
Phase Margin, PM (deg.)
80 70 60 50 40 30 20 10 0 0
VDD = 3.0 V
140 120 100 80 60 40 20 0 10 100
VDD = 3.0 V
50 100 150 200 250 300 350 400 Capacitive Load, CL (pF)
1 k 10 k 100 k 1 M Frequency, f (Hz)
10 M
Noise Input Voltage, VNI (nV/Hz)
Figure 29 HA1630D08 Noise Input Voltage vs. Frequency 100 80 60 40 20 0 100 1k 10 k Frequency, f (Hz) 100 k
VDD = 3.0 V
REJ03D0860-0200 Rev.2.00 Nov 30, 2007 Page 12 of 14
Phase (deg.)
HA1630D08
Package Dimensions
Package Name MMPAK-8 JEITA Package Code P-LSOP8-2.8 x 2.95 - 0.65 RENESAS Code PLSP0008JC-A Previous Code MASS[Typ.] 0.02 g
Unit: mm
0.13 +0.12 -0.03
2.95 0.2
4.0 0.3
2.8 0.1
0 to 0.1
0.65 1.95
0.1 M
0.2
1.1 0.1
0.3
0.1
JEITA Package Code P-TSSOP8-4.4x3-0.65
RENESAS Code PTSP0008JC-B
Previous Code TTP-8DAV
MASS[Typ.] 0.034g
*1
D 5
0.6
+0.1 -0.05
F
8
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE
E
*2
Terminal cross section ( Ni/Pd/Au plating )
Index mark
c
Reference Dimension in Millimeters Symbol
L1
1 Z e
4
*3
bp
x
M
A
A1
L
Detail F
y
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 3.00 3.30 4.40
0.03 0.07 0.10 1.10 0.15 0.20 0.25 0.10 0.15 0.20 0 8 6.20 6.40 6.60 0.65 0.13 0.10 0.805 0.40 0.50 0.60 1.00
REJ03D0860-0200 Rev.2.00 Nov 30, 2007 Page 13 of 14
HA1630D08
Taping & Reel Specification
[Taping] Package Code TSSOP-8 MMPAK-8 W 12 12 P 8 4.0 Ao 6.9 3.15 Bo 3.6 4.35 Ko 1.7 -- E 1.75 -- 4.0 2.0 F 5.5 5.5 D1 1.5 1.05 Maximum Storage No. 3,000 pcs/reel 3,000 pcs/reel
1.75
Unit: mm
1.5 Cover Tape A0
F
K0
B0
P Tape withdraw direction
D1
W
W1
[Ordering Information] Ordering Unit 3,000 pcs
2.0 2.0 W2
Mark Indication
* TSSOP-8 * MMPAK-8
0D08
Trace Code
D08
Trace Code
REJ03D0860-0200 Rev.2.00 Nov 30, 2007 Page 14 of 14
A
[Reel] Package TSSOP-8 MMPAK-8
Tape width 12 12
W1 17.4 17.0
W2 13.4 13.0
A 330 178
13.0 0.5
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